Top 25 Downloaded Manuscripts - 2014
- Analysis and Design of a Low-Voltage Low-Power Double-Tail Comparator
Babayan-Mashhadi, S.; Lotfi, R.
- Low-Power Correlation for IEEE 802.16 OFDM Synchronization on FPGA
Pham, T.H.; Fahmy, S.A.; Mcloughlin, I.V.
- Low-Power and Area-Efficient Carry Select Adder
Ramkumar, B.; Kittur, H.M.
- Design of a Low-Voltage Low-Dropout Regulator
Chung-Hsun Huang; Ying-Ting Ma; Wei-Chen Liao
- Logical Effort for CMOS-Based Dual Mode Logic Gates
Levi, I.; Belenky, A.; Fish, A.
- Low-Power Digital Signal Processor Architecture for Wireless Sensor Nodes
Walravens, C.; Dehaene, W.
- Low-Power Pulse-Triggered Flip-Flop Design Based on a Signal Feed-Through
Jin-Fa Lin
- Split-SAR ADCs: Improved Linearity With Power and Speed Optimization
Yan Zhu; Chi-Hang Chan; U-Fat Chio; Sai-Weng Sin; Seng-Pan U; Martins, R.P.; Maloberti, F.
- CMOS Full-Adders for Energy-Efficient Arithmetic Applications
Aguirre-Hernandez, M.; Linares-Aranda, M.
- ASIC and FPGA Implementation of the Gaussian Mixture Model Algorithm for Real-Time Segmentation of High Definition Video
Genovese, M.; Napoli, E.
- Area-Delay Efficient Binary Adders in QCA
Perri, S.; Corsonello, P.; Cocorullo, G.
- Design of ultrahigh-speed low-voltage CMOS CML buffers and latches
Heydari, P.; Mohanavelu, R.
- Design of Logic Gates and Flip-Flops in High-Performance FinFET Technology
Bhoj, A.N.; Jha, N.K.
- Area-Delay-Power Efficient Fixed-Point LMS Adaptive Filter With Low Adaptation-Delay
Meher, P.K.; Sang Yoon Park
- Efficient VLSI Implementation of Neural Networks With Hyperbolic Tangent Activation Function
Zamanlooy, B.; Mirhassani, M.
- Effective and Efficient Approach for Power Reduction by Using Multi-Bit Flip-Flops
Shyu, Y.-T.; Lin, J.-M.; Huang, C.-P.; Lin, C.-W.; Lin, Y.-Z.; Chang, S.-J.
- FPGA-Based Bit Error Rate Performance Measurement of Wireless Systems
Alimohammad, A.; Fard, S.F.
- FPGA-RPI: A Novel FPGA Architecture With RRAM-Based Programmable Interconnects
Cong, J.; Bingjun Xiao
- Computation on Stochastic Bit Streams Digital Image Processing Case Studies
Peng Li; Lilja, D.J.; Weikang Qian; Bazargan, K.; Riedel, M.D.
- Efficient Power-Analysis-Resistant Dual-Field Elliptic Curve Cryptographic Processor Using Heterogeneous Dual-Processing-Element Architecture
Jen-Wei Lee; Szu-Chi Chung; Hsie-Chia Chang; Chen-Yi Lee
- Design Flow for Flip-Flop Grouping in Data-Driven Clock Gating
Wimer, S.; Koren, I.
- Data Encoding Techniques for Reducing Energy Consumption in Network-on-Chip
Jafarzadeh, N.; Palesi, M.; Khademzadeh, A.; Afzali-Kusha, A.
- Design of Testable Reversible Sequential Circuits
Thapliyal, H.; Ranganathan, N.; Kotiyal, S.
- A Novel Single-Inductor Dual-Input Dual-Output DCDC Converter With PWM Control for Solar Energy Harvesting System
Hui Shao; Xing Li; Chi-ying Tsui; Wing-Hung Ki
- Security-Enabled Near-Field Communication Tag With Flexible Architecture Supporting Asymmetric Cryptography
Plos, T.; Hutter, M.; Feldhofer, M.; Stiglic, M.; Cavaliere, F.