Editor-in-Chief
Massimo Alioto
Department of Electrical and Computer Engineering
National University of Singapore
Singapore 117583
malioto@ieee.org
ultra-low power integrated circuits and systems; widely energy-scalable systems; HW security; data-driven systems; emerging technologies
Associate Editor-in-Chief
Pasquale Corsonello
Department of Informatics, Modeling, Electronics and System Engineering (DIMES)
University of Calabria
Rende, Italy
p.corsonello@unical.it
CMOS digital circuits; Low-Power digital circuit design; VLSI circuits for image processing; Field Programmable Gate Arrays; Quantum Dot Cellular Automata circuits and architectures
Associate Editor-in-Chief
Mircea Stan
Electrical and Computer Engineering
University of Virginia
Charlottesville, Virginia 22904 USA
mircea@virginia.edu
High-performance low-power design; VLSI circuits; Processing in memory; Hardware accelerators; Nanoelectronics
Associate Editor
Magdy Abadir
Abadir and Associates
5824 Westslope Dr, Austin, TX 78731
magdy.abadir@gmail.com
EDA; Test; Verification; Security; Electromagnetic-Coupling
Associate Editor
Tughrul Arslan
Integrated Electronic Systems
Scottish Microelectronics Centre
Kings Buildings, Edinburgh, EH9 3FF
T.Arslan@ed.ac.uk
Adaptive Circuits and Systems; Reconfigurable Hardware and systems; Circuits and systems for mission critical applications; Adaptive and reconfigurable computing for High performance computing; cloud and Big data;
Adaptive and Neural systems for 5G and Wireless Communications; Adaptive and reconfigurable systems for healthcare and microwave imaging; Low power systems for wireless; wearable; implantable and IoT devices; Reconfigurable systems for navigation applications
Associate Editor
Amine Bermak
College of science and engineering
Hamad Bin Khalifa University
Qatar
abermak@hbku.edu.qa
CMOS Image sensors; Wearable Sensors; Printed electronics; Olfactory and gas sensors; Temperature sensors
Associate Editor
Chye Chirin Boon
Nanyang Technological Univ.
Singapore
ECCBoon@ntu.edu.sg
RF Receiver; RF Transmitter; Phase-locked Loop (PLL); Wireless IC; MMW IC
Associate Editor
Andreas Burg
Telecommunications Circuits Lab (TCL)
École Polytechnique Fédérale de Lausanne (EPFL)
Switzerland
andreas.burg@epfl.ch
VLSI Signal Processing; Circuits and Systems for Communications; Low Power Digital Circuits; Memories; Embedded Systems
Associate Editor
Chip-Hong Chang
School of Electrical and Electronic Engineering
Nanyang Technological University
Singapore
ECHChang@ntu.edu.sg
Hardware security; Trusted computing; Computer arithmetic; Hardware accelerator; Dependable and reliable application-specific digital signal processors
Associate Editor
Meng-Fan (Marvin) Chang
Department of Electrical Engineering
National Tsing Hua University
Hsinchu, 30013
Taiwan
mfchang@ee.nthu.edu.tw
Volatile Memory circuits; Nonvolatile Memory circuits; Computing-in-memory or Process-in-Memory; Low-voltage circuits; Memristor circuits
Associate Editor
Yao-Wen Chang
Department of Electrical Engineering
National Taiwan University
Taipei, 10615
Taiwan
ywchang@ntu.edu.tw
Physical Design Automation; Design for Manufacturability/Reliability; Analog Layout Design Automation; Package, Board, and Chip Design/Co-Design; Low Power Design Automation
Associate Editor
Poki Chen
Department of Electronic Engineering
National Taiwan University of Science and Technology
Taipei, Taiwan, R.O.C.
poki@mail.ntust.edu.tw
Temperature sensor; Time-to-digital converter; Digital-to-time converter; Analog-to-digital converter; Digital-to-analog converter
Associate Editor
Yong (Nick) Chen
State Key Laboratory of Analog and Mixed-Signal VLSI and IME/FST-ECE
University of Macau
China
ychen@um.edu.mo chenyong@ieee.org
Analog and mixed-signal integrated circuits; RF, mm-wave and THz systems and circuits; Ultra-high-speed electrical and optical wireline systems and circuits; On-chip interconnects
Associate Editor
Paolo S. Crovetti
Dept. of Electronics and Telecommunications (DET)
Politecnico di Torino
10129 Torino (Italy)
paolo.crovetti@polito.it
Analog and Mixed Mode Circuits and Systems; Low power/low voltage analog circuits; Voltage and current references; Digital to Analog Converters/Analog to Digital Converters; Timing circuits and clock generators
Associate Editor
Raffaele De Rose
Department of Computer Engineering Modeling, Electronics and Systems Engineering (DIMES)
University of Calabria
Rende, Italy, 87036
r.derose@dimes.unical.it
low-voltage and low-power design; CMOS analog circuits; spintronics; logic-in-memory; hardware security
Associate Editor
Anh Tuan Do
Institute of Microelectronics
Singapore 138634
doat@ime.a-star.edu.sg
Emerging memory technology; Ultra-low Power hardware accelerator for AI hardware; HW security and Cryogenic CMOS
Associate Editor
Shiro Dosho
Lab. for Future Interdisciplinary Research of Science and Tech.(FIRST)
Tokyo Institute of Technology
Yokohama, 226-8503, Japan
dosho.s.aa@m.titech.ac.jp
ADC; PLL; Sensor; Analog; CMOS
Associate Editor
Rolf Drechsler
University of Bremen/DFKI
Germany
drechsler@uni-bremen.de
Verification; Test; Logic Synthesis; Formal Methods; BDDs
Associate Editor
Ibrahim (Abe) Elfadel
Institute Center for Microsystems (iMicro)
Masdar Institute of Science and Technology
Abu Dhabi, UAE
ielfadel@masdar.ac.ae
CAD; SoC; 3D integration; Embedded signal processing; Sensory systems
Associate Editor
Xuanyao (Kelvin) Fong
National University of Singapore
Singapore
Singapore 117583
kelvin.xy.fong@nus.edu.sg
Non-volatile devices; device-to-systems co-design; unconventional computing; beyond Moore technologies; spintronics
Associate Editor
Masanori Hashimoto
Department of Communications and Computer Engineering
Kyoto University
Kyoto, Japan
hashimoto@i.kyoto-u.ac.jp
Design for reliability; Timing analysis; Power integrity analysis; Low voltage design; Low power design
Associate Editor
Deukhyoun Heo
School of Electrical Engineering and Computer Science
Washington State Univ. Pullman
WA 99164-2752 USA
dheo@wsu.edu
RF/Microwave/Mm-wave Wireless Transceiver; Power management Circuits; Wireless links for intra- and inter-chip communications;Beamforming Circuits; High Performance Interconnects for 3D ICs
Associate Editor
Tsung-Yi Ho
Dept. of Computer Science
National Chiao Tung University
Hsinchu, Taiwan 30010
tyho@cs.nctu.edu.tw
Biological System; CAD; Lab-on-Chips; Hardware Security; Machine Learning
Associate Editor
Yuh-Shyan Hwang
Department of Electronic Engineering
National Taipei University of Technology
Taipei, Taiwan, R.O.C.
yshwang@mail.ntut.edu.tw
Analog ICs; Mixed-signal ICs; Power Management ICs; Sensor Circuits; Low-voltage Low-power VLSI circuits
Associate Editor
Ajay Joshi
Department of ECE
Boston University
Boston MA 02215 USA
joshi@bu.edu
Security; Network-on-chip; Silicon-photonics; Accelerators; Cross-layer optimization
Associate Editor
Rajiv Joshi
IBM
Yorktown Heights, NY 10598
rvjoshi@us.ibm.com
Expertise - Low Power circuits; Statistical techniques for Machine learning; variability techniques; Memories (volatile and non-volatile); Hardware accelerators for CNN/DNN; In-Memory Computation; Quantum Computing
Associate Editor
Tanay Karnik
Academic Research Office
Intel Corporation
Hillsboro, OR 97124
Tanay.Karnik@intel.com
Adaptive circuits; Switching converters; Cache memories; Radiation Hardening; Physical Design
Associate Editor
Mehran Mozaffari Kermani
College of Engineering
University of South Florida
Tampa, FL 33620
mehran2@usf.edu
Cryptographic Engineering; Hardware Security; FPGA/ASIC Reliability; Fault Detection; Computer Arithmetic
Associate Editor
Chulwoo Kim
Dept. of Electronics Engineering
Korea University
ckim@korea.ac.kr
PLL; Power management; Data converter; Wireline transceiver; Energy harvesting
Associate Editor
Tony Kim
School of Electrical and Electronic Engineering
Nanyang Technological University
Singapore 639798
thkim@ntu.edu.sg
SRAM; Emerging Memory Circuits; Ultra-Low Power Digital Circuits; Circuit Reliability
Associate Editor
Seokbum Ko
Department of Computer Science
University of Saskatchewan
Saskatoon, Canada, S7N 5A9
seokbum.ko@usask.ca
Computer arithmetic; Deep learning; Artificial Intelligence; computer architecture; biomedical engineering
Associate Editor
Jaydeep Kulkarni
Department of Electrical and Computer Engineering
University of Texas at Austin
Austin, TX 78701
jaydeep@austin.utexas.edu
Memory; Low-voltage design; Energy-efficiency; Resiliency; Power-management
Associate Editor
Volkan Kursun
Department of Electronic Systems
Norwegian University of Science and Technology
7034 Trondheim, Norway
volkan.kursun@ntnu.no
Heterogeneous 3D systems-on-chip; Neuromorphic engineering; Energy-efficient computing; Internet of intelligent things; Biomedical electronics
Associate Editor
Yoonmyung Lee
Department of Electrical and Computer Engineering
Sungkyunkwan University (SKKU)
Suwon-si, Gyeonggi-do,16419
South Korea
yoonmyung@skku.edu
Ultra-low power circuit design; Physically uncloneable function; SRAM; Adaptive/variation-tolerant circuit; Subthreshold circuit
Associate Editor
Huawei Li
Institute of Computing Technology, Chinese Academy of Sciences
Beijing 100190, China
lihuawei@ict.ac.cn
Testing of VLSI/SOC circuits; Design verification of digital systems; Design for reliability; Error tolerant computing; Approximate computing
Associate Editor
Longyang Lin
School of Microelectronics
Southern University of Science and Technology
Shenzhen 518055, China
linlongyang@ieee.org
Digital Integrated Circuits and Systems; Ultra-Low Power VLSI Circuits; Self-Powered Sensor Nodes; Widely Energy-Scalable Systems; Compute-in-Memory
Associate Editor
Prabhat Mishra
Department of Computer & Information Science & Engineering
Univ. of Florida
Gainesville, FL 32611 USA
prabhat@cise.ufl.edu
System-on-Chip Validation and Debug; Formal Verification, Energy-aware Computing; Hardware Security and Trust; Embedded and Cyber-Physical Systems
Associate Editor
Baker Mohammad
Electrical and Computer Engineering Department
Khalifa University, Abu Dhabi
United Arab Emirate
baker.mohammad@ku.ac.ae
In memory computing; Low Power Digital Design; RRAM; Embedded Memory Design; System on Chip; Power management
Associate Editor
Makoto Nagata
Graduate School of System Informatics
Kobe University
Kobe, Japan
nagata@cs.kobe-u.ac.jp
Mixed signal VLSI design; Hardware security; 3D IC; Power supply integrity; Electromagnetic compatibility
Associate Editor
Koji Nii
TSMC Design Technology Japan, Inc.
Yokohama 220-0012, Japan
nii.koji@gmail.com
SRAM; TCAM; ROM; Low-power; Embedded memory
Associate Editor
Mahdi Nikdast
Department of Electrical and Computer Engineering
Colorado State University
Fort Collins, CO 80523 USA
Mahdi.Nikdast@colostate.edu
Silicon Photonics; High-Performance Computing; Electronic-Photonic System-on-Chip; Cross-Layer Design and Optimization; Interconnects
Associate Editor
Partha Pande
Computer Engineering School of EECS
Washington State Univ.
Pullman, WA 99164-2752 USA
pande@eecs.wsu.edu
Network-on-Chip; Multicore; Power Management; 3D Integration; Hardware Accelerato
Associate Editor
Bipul C. Paul
GLOBALFOUNDRIES
Malta, NY 12020, USA
bipul.paul@globalfoundries.com
Low-power digital circuits; Memory; Emerging technologies; Statistical design; Design for reliability
Associate Editor
Vailis Pavlidis
Department of Computer Science
The University of Manchester
Manchester, Lancashire, M139PL, UK
vasileios.pavlidis@manchester.ac.uk
3-D integration; Interconnect modeling; Clock distribution networks; Power integrity; Thermal analysis
Associate Editor
José Pineda de Gyvez
NXP Semiconductors
The Netherlands
jose.pineda.de.gyvez@nxp.com
Systems power management; Technology-aware physical design; Low power digital design; IoT edge computing; Variability tolerance
Associate Editor
Khaled N Salama
Electrical and Computer Engineering
King Abdullah University of Science and Technology (KAUST)
Thuwal, Saudi Arabia, 23955-6900
khaled.salama@kaust.edu.sa
Brain inspired computing; Biosensors; Biomedical circuits and systems; Emerging Technologies; mixed-signal circuits and systems
Associate Editor
Ioannis Savidis
Department of Electrical and Computer Engineering
Drexel University
Philadelphia, PA 19104
isavidis@coe.drexel.edu
VLSI; Hardware security; 3-D integrated circuits; Low-power circuits; Clock and power delivery
Associate Editor
Patrick Schaumont
Department of Electrical and Computer Engineering
Worcester Polytechnic Institute
Worcester, MA 01609
pschaumont@wpi.edu
Hardware Security; Cryptographic Engineering; Side-channel Analysis; System-on-Chip; Embedded Systems
Associate Editor
Fabio Sebastiano
Department of Quantum and Computer Engineering & Department of Microelectronics
Delft University of Technology
The Netherlands
F.Sebastiano@tudelft.nl
Cryogenic electronics; Quantum computing; Analog circuits; Mixed-signal circuits; Frequency references
Associate Editor
Anirban Sengupta
Discipline of Computer Science and Engineering
Indian Institute of Technology (IIT)
Indore, MP, 453552, India
asengupt@iiti.ac.in
Hardware Security; IP core Protection; High Level Synthesis; Hardware Optimization; EDA-CAD
Associate Editor
Mingoo Seok
Electrical Engineering
Columbia University
New York, NY 10027
ms4415@columbia.edu
VLSI; Integrated circuits; Ultra-low power computing; Resilient computing; Integrated power electronics
Associate Editor
Vaishnav Srinivas
Qualcomm Inc.
San Diego, CA 92121
vaishnav.srinivas@gmail.com
IO circuit design, signal and power integrity, PDN design, circuits-to-systems, interconnect cross-layer exploration
Associate Editor
Armin Tajalli
Electrical & Computer Engineering Department
University of Utah
Salt Lake City, UT 84112
armin.tajalli@utah.edu
Data movement; High bandwidth communications; Clocking and phase-locked loops; Ultra-low-power; Analog and mixed-signal; Bio-interface circuits; Data converters
Associate Editor
Aida Todri-Sanial
Microelectronics Department
CNRS-LIRMM/University of Montpellier
Montpellier, France 34095
aida.todri@lirmm.fr
Physical design; Power/clock network design; Power/thermal analysis; 3D integration; Carbon nanotubes
Associate Editor
Valerio Vignoli
Department of Information Engineering and Mathematics
University of Siena
Italy
Valerio.vignoli@unisi.it
Circuits based on non-linear dynamical systems; True-random number generators (TRNGs); Pseudo-random number generators (PRNGs); Physically Unclonable Functions (PUFs); Sensor-based measurement systems
Associate Editor
Xiaoqing Wen
Dept. of Creative Informatics
Kyushu Institute of Technology
Fukuoka 820-8502, Japan
wen@cse.kyutech.ac.jp
Testable design; Test generation; Fault simulation; Low-power testing; Fault diagnosis
Associate Editor
Jiang Xu
Department of Electronic and Computer Engineering
Hong Kong University of Science and Technology
Clear Water Bay, Kowloon, Hong Kong SAR
jiang.xu@ust.hk
Optical/Photonic technology; Power management; Hardware/Software codesign; Memory system; Multiprocessor
Associate Editor
Kaiyuan Yang
Department of Electrical and Computer Engineering
Rice University
Houston, TX 77005 USA
kyang@rice.edu
Ultra-low power digital and analog circuits; Hardware security and trust; In-memory Computation; Energy harvester and power transfer; Biomedical Electronics
Associate Editor
Wei Zhang
Dept. of Electronic & Computer Engineering
Hong Kong Univ. of Sci. & Technology
New Territories, Hong Kong China
wei.zhang@ust.hk
Reconfigurable system and FPGA based design; High-performance heterogeneous system; Embedded system security; Power/Energy management; Emerging technology
Associate Editor
Zhengya Zhang
Electrical Engineering and Computer Science
University of Michigan, Ann Arbor
Ann Arbor, MI 48109-2122 USA
zhengya@umich.edu
Machine learning accelerator; Neuromorphic computing; Processors for robotics and navigation; Security hardware; Architectures and systems for emerging applications
Associate Editor
Jun Zhou
School of Information and Communication Engineering
University of Electronic Science and Technology of China
Chengdu, Sichuan, P. R. China
zhouj@uestc.edu.cn
Machine Learning; Processor; Intelligent Sensing; Low Power; Digital Circuits and Systems
Associate Editor
Mark Zwolinski
School of Electronics and Computer Science
University of Southampton
Southampton, SO17 1BJ, United Kingdom
mz1@soton.ac.uk
Reliability; Hardware Security; Testing; Simulation; Modeling
Editorial Assistant
Stacey Weber Jackson
Dept. of Electrical Engineering
Princeton University
Princeton, NJ 08544
tvlsiadm@ieee.org